From db0c81249d7a429d3439eba0b52a8c2a76c00de2 Mon Sep 17 00:00:00 2001 From: lak2abt Date: Thu, 21 Jul 2016 11:32:22 +0200 Subject: [PATCH] All files imported using a new name - original project was ChinaCluster. --- pcb/USB2SerialMux.kicad_pcb | 1092 +++++++++++++++++++++++++++++++++++ pcb/USB2SerialMux.net | 389 +++++++++++++ pcb/USB2SerialMux.pro | 94 +++ pcb/USB2SerialMux.sch | 603 +++++++++++++++++++ pcb/ftdi.lib | 48 ++ pcb/my74xx.lib | 72 +++ 6 files changed, 2298 insertions(+) create mode 100644 pcb/USB2SerialMux.kicad_pcb create mode 100644 pcb/USB2SerialMux.net create mode 100644 pcb/USB2SerialMux.pro create mode 100644 pcb/USB2SerialMux.sch create mode 100644 pcb/ftdi.lib create mode 100644 pcb/my74xx.lib diff --git a/pcb/USB2SerialMux.kicad_pcb b/pcb/USB2SerialMux.kicad_pcb new file mode 100644 index 0000000..f15d738 --- /dev/null +++ b/pcb/USB2SerialMux.kicad_pcb @@ -0,0 +1,1092 @@ +(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-2~bpo8+1-stable) + + (general + (links 62) + (no_connects 0) + (area 123.956999 91.025 180.368334 116.890001) + (thickness 1.6) + (drawings 5) + (tracks 324) + (zones 0) + (modules 13) + (nets 44) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (segment_width 0.2) + (edge_width 0.1) + (via_size 0.6) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.5 1.5) + (pad_drill 0.6) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 0x00030_80000001) + (usegerberextensions false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 GND) + (net 2 +5V) + (net 3 +3V3) + (net 4 /D-) + (net 5 /D+) + (net 6 "Net-(P1-Pad4)") + (net 7 "Net-(P3-Pad1)") + (net 8 "Net-(P3-Pad2)") + (net 9 "Net-(P3-Pad3)") + (net 10 "Net-(P3-Pad4)") + (net 11 "Net-(P3-Pad5)") + (net 12 "Net-(P3-Pad6)") + (net 13 "Net-(P3-Pad7)") + (net 14 "Net-(P3-Pad8)") + (net 15 "Net-(P4-Pad1)") + (net 16 "Net-(P4-Pad2)") + (net 17 "Net-(P4-Pad3)") + (net 18 "Net-(P4-Pad4)") + (net 19 "Net-(P4-Pad5)") + (net 20 "Net-(P4-Pad6)") + (net 21 "Net-(P4-Pad7)") + (net 22 "Net-(P4-Pad8)") + (net 23 /TxD_RxD) + (net 24 "Net-(U1-Pad2)") + (net 25 "Net-(U1-Pad3)") + (net 26 /RxD_TxD) + (net 27 "Net-(U1-Pad6)") + (net 28 "Net-(U1-Pad8)") + (net 29 "Net-(U1-Pad9)") + (net 30 "Net-(U1-Pad10)") + (net 31 "Net-(U1-Pad11)") + (net 32 "Net-(U1-Pad12)") + (net 33 "Net-(U1-Pad13)") + (net 34 "Net-(U1-Pad14)") + (net 35 "Net-(U1-Pad19)") + (net 36 "Net-(U1-Pad22)") + (net 37 "Net-(U1-Pad23)") + (net 38 "Net-(U1-Pad24)") + (net 39 "Net-(U1-Pad27)") + (net 40 "Net-(U1-Pad28)") + (net 41 /S2) + (net 42 /S1) + (net 43 /S0) + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.6) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +3V3) + (add_net +5V) + (add_net /D+) + (add_net /D-) + (add_net /RxD_TxD) + (add_net /S0) + (add_net /S1) + (add_net /S2) + (add_net /TxD_RxD) + (add_net GND) + (add_net "Net-(P1-Pad4)") + (add_net "Net-(P3-Pad1)") + (add_net "Net-(P3-Pad2)") + (add_net "Net-(P3-Pad3)") + (add_net "Net-(P3-Pad4)") + (add_net "Net-(P3-Pad5)") + (add_net "Net-(P3-Pad6)") + (add_net "Net-(P3-Pad7)") + (add_net "Net-(P3-Pad8)") + (add_net "Net-(P4-Pad1)") + (add_net "Net-(P4-Pad2)") + (add_net "Net-(P4-Pad3)") + (add_net "Net-(P4-Pad4)") + (add_net "Net-(P4-Pad5)") + (add_net "Net-(P4-Pad6)") + (add_net "Net-(P4-Pad7)") + (add_net "Net-(P4-Pad8)") + (add_net "Net-(U1-Pad10)") + (add_net "Net-(U1-Pad11)") + (add_net "Net-(U1-Pad12)") + (add_net "Net-(U1-Pad13)") + (add_net "Net-(U1-Pad14)") + (add_net "Net-(U1-Pad19)") + (add_net "Net-(U1-Pad2)") + (add_net "Net-(U1-Pad22)") + (add_net "Net-(U1-Pad23)") + (add_net "Net-(U1-Pad24)") + (add_net "Net-(U1-Pad27)") + (add_net "Net-(U1-Pad28)") + (add_net "Net-(U1-Pad3)") + (add_net "Net-(U1-Pad6)") + (add_net "Net-(U1-Pad8)") + (add_net "Net-(U1-Pad9)") + ) + + (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm (layer F.Cu) (tedit 5789E955) (tstamp 5789E0C1) + (at 160.02 110.49 90) + (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)") + (tags "SSOP 0.65") + (path /5789DF39) + (attr smd) + (fp_text reference U2 (at 0 -3.55 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74HC4051 (at 0 3.55 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.95 -2.8) (end -3.95 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.95 -2.8) (end 3.95 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.95 -2.8) (end 3.95 -2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.95 2.8) (end 3.95 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.2 2.725) (end 2.2 2.725) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.775 -2.725) (end 2.2 -2.725) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 11 "Net-(P3-Pad5)")) + (pad 2 smd rect (at -2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 13 "Net-(P3-Pad7)")) + (pad 3 smd rect (at -2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 23 /TxD_RxD)) + (pad 4 smd rect (at -2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 14 "Net-(P3-Pad8)")) + (pad 5 smd rect (at -2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 12 "Net-(P3-Pad6)")) + (pad 6 smd rect (at -2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 7 smd rect (at -2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 8 smd rect (at -2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 9 smd rect (at 2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 41 /S2)) + (pad 10 smd rect (at 2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 42 /S1)) + (pad 11 smd rect (at 2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 43 /S0)) + (pad 12 smd rect (at 2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 10 "Net-(P3-Pad4)")) + (pad 13 smd rect (at 2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 7 "Net-(P3-Pad1)")) + (pad 14 smd rect (at 2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 8 "Net-(P3-Pad2)")) + (pad 15 smd rect (at 2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 9 "Net-(P3-Pad3)")) + (pad 16 smd rect (at 2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm (layer F.Cu) (tedit 5789E9AC) (tstamp 5789E0AD) + (at 145.009 107.404 90) + (descr "28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)") + (tags "SSOP 0.65") + (path /5789EA06) + (attr smd) + (fp_text reference U1 (at 0 -6.25 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value FT232RL (at 0 6.25 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -4.75 -5.5) (end -4.75 5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.75 -5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.75 -5.5) (end 4.75 -5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.75 5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.875 -5.325) (end -2.875 -4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.875 -5.325) (end 2.875 -4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.875 5.325) (end 2.875 4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 5.325) (end -2.875 4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 -5.325) (end 2.875 -5.325) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 5.325) (end 2.875 5.325) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 -4.675) (end -4.475 -4.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -3.6 -4.225 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 23 /TxD_RxD)) + (pad 2 smd rect (at -3.6 -3.575 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 24 "Net-(U1-Pad2)")) + (pad 3 smd rect (at -3.6 -2.925 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 25 "Net-(U1-Pad3)")) + (pad 4 smd rect (at -3.6 -2.275 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 5 smd rect (at -3.6 -1.625 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 26 /RxD_TxD)) + (pad 6 smd rect (at -3.6 -0.975 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 27 "Net-(U1-Pad6)")) + (pad 7 smd rect (at -3.6 -0.325 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 8 smd rect (at -3.6 0.325 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 28 "Net-(U1-Pad8)")) + (pad 9 smd rect (at -3.6 0.975 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 29 "Net-(U1-Pad9)")) + (pad 10 smd rect (at -3.6 1.625 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 30 "Net-(U1-Pad10)")) + (pad 11 smd rect (at -3.6 2.275 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 31 "Net-(U1-Pad11)")) + (pad 12 smd rect (at -3.6 2.925 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 32 "Net-(U1-Pad12)")) + (pad 13 smd rect (at -3.6 3.575 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 33 "Net-(U1-Pad13)")) + (pad 14 smd rect (at -3.6 4.225 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 34 "Net-(U1-Pad14)")) + (pad 15 smd rect (at 3.6 4.225 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 5 /D+)) + (pad 16 smd rect (at 3.6 3.575 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 4 /D-)) + (pad 17 smd rect (at 3.6 2.925 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 18 smd rect (at 3.6 2.275 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 19 smd rect (at 3.6 1.625 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 35 "Net-(U1-Pad19)")) + (pad 20 smd rect (at 3.6 0.975 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 2 +5V)) + (pad 21 smd rect (at 3.6 0.325 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 22 smd rect (at 3.6 -0.325 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 36 "Net-(U1-Pad22)")) + (pad 23 smd rect (at 3.6 -0.975 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 37 "Net-(U1-Pad23)")) + (pad 24 smd rect (at 3.6 -1.625 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 38 "Net-(U1-Pad24)")) + (pad 25 smd rect (at 3.6 -2.275 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 26 smd rect (at 3.6 -2.925 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 27 smd rect (at 3.6 -3.575 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 39 "Net-(U1-Pad27)")) + (pad 28 smd rect (at 3.6 -4.225 90) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 40 "Net-(U1-Pad28)")) + (model Housings_SSOP.3dshapes/SSOP-28_5.3x10.2mm_Pitch0.65mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_1x08 (layer F.Cu) (tedit 578A5A28) (tstamp 5789E08D) + (at 167.64 95.25) + (descr "Through hole pin header") + (tags "pin header") + (path /57880227) + (fp_text reference P4 (at 0 -2.6) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value CONN_01X08 (at 0 -3.1) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 -1.75) (end -1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 -1.75) (end 1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 19.55) (end 1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.27 1.27) (end 1.27 19.05) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 19.05) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (pad 1 thru_hole oval (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 15 "Net-(P4-Pad1)")) + (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 16 "Net-(P4-Pad2)")) + (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 17 "Net-(P4-Pad3)")) + (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 18 "Net-(P4-Pad4)")) + (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 19 "Net-(P4-Pad5)")) + (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 20 "Net-(P4-Pad6)")) + (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 21 "Net-(P4-Pad7)")) + (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 22 "Net-(P4-Pad8)")) + (model Pin_Headers.3dshapes/Pin_Header_Straight_1x08.wrl + (at (xyz 0 -0.35 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_1x08 (layer F.Cu) (tedit 578A5A87) (tstamp 5789E075) + (at 175.26 95.25) + (descr "Through hole pin header") + (tags "pin header") + (path /578802D4) + (fp_text reference P2 (at 0 -2.6) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value CONN_01X08 (at 0 -3.1) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 -1.75) (end -1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 -1.75) (end 1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 19.55) (end 1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.27 1.27) (end 1.27 19.05) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 19.05) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (pad 1 thru_hole oval (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 GND)) + (model Pin_Headers.3dshapes/Pin_Header_Straight_1x08.wrl + (at (xyz 0 -0.35 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_1x08 (layer F.Cu) (tedit 578A5A68) (tstamp 5789E081) + (at 171.45 95.25) + (descr "Through hole pin header") + (tags "pin header") + (path /578800A6) + (fp_text reference P3 (at 0 -2.6) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value CONN_01X08 (at 0 -3.1) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 -1.75) (end -1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 -1.75) (end 1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 19.55) (end 1.75 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.27 1.27) (end 1.27 19.05) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 19.05) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (pad 1 thru_hole oval (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 7 "Net-(P3-Pad1)")) + (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 8 "Net-(P3-Pad2)")) + (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 9 "Net-(P3-Pad3)")) + (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 10 "Net-(P3-Pad4)")) + (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 11 "Net-(P3-Pad5)")) + (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 12 "Net-(P3-Pad6)")) + (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 13 "Net-(P3-Pad7)")) + (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 14 "Net-(P3-Pad8)")) + (model Pin_Headers.3dshapes/Pin_Header_Straight_1x08.wrl + (at (xyz 0 -0.35 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 5789E98B) (tstamp 5789E04A) + (at 136.906 101.6 90) + (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)") + (tags "capacitor 0805") + (path /57894879) + (attr smd) + (fp_text reference C1 (at 0 -2.1 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4,7u (at 0 2.1 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask) + (net 2 +5V)) + (pad 2 smd rect (at 1 0 90) (size 1 1.25) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0805.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 5789E9B4) (tstamp 5789E050) + (at 153.67 110.49 90) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /57892EC4) + (attr smd) + (fp_text reference C2 (at 0 -1.9 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.9 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 5789E93C) (tstamp 5789E056) + (at 153.67 97.79 90) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /57893092) + (attr smd) + (fp_text reference C3 (at 0 -1.9 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.9 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 5789E9A1) (tstamp 5789E05C) + (at 136.906 106.68 270) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /578961B9) + (attr smd) + (fp_text reference C4 (at 0 1.9 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10n (at 0 1.9 270) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 2 +5V)) + (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm (layer F.Cu) (tedit 5789E94E) (tstamp 5789E0D5) + (at 160.02 97.79 90) + (descr "16-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] (see Microchip Packaging Specification 00000049BS.pdf)") + (tags "SSOP 0.65") + (path /5789E407) + (attr smd) + (fp_text reference U3 (at 0 -3.55 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74HCT4051 (at 0 3.55 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.95 -2.8) (end -3.95 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.95 -2.8) (end 3.95 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.95 -2.8) (end 3.95 -2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.95 2.8) (end 3.95 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.2 2.725) (end 2.2 2.725) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.775 -2.725) (end 2.2 -2.725) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 19 "Net-(P4-Pad5)")) + (pad 2 smd rect (at -2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 21 "Net-(P4-Pad7)")) + (pad 3 smd rect (at -2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 26 /RxD_TxD)) + (pad 4 smd rect (at -2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 22 "Net-(P4-Pad8)")) + (pad 5 smd rect (at -2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 20 "Net-(P4-Pad6)")) + (pad 6 smd rect (at -2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 7 smd rect (at -2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 8 smd rect (at -2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 9 smd rect (at 2.95 2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 41 /S2)) + (pad 10 smd rect (at 2.95 1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 42 /S1)) + (pad 11 smd rect (at 2.95 0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 43 /S0)) + (pad 12 smd rect (at 2.95 0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 18 "Net-(P4-Pad4)")) + (pad 13 smd rect (at 2.95 -0.325 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 15 "Net-(P4-Pad1)")) + (pad 14 smd rect (at 2.95 -0.975 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 16 "Net-(P4-Pad2)")) + (pad 15 smd rect (at 2.95 -1.625 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 17 "Net-(P4-Pad3)")) + (pad 16 smd rect (at 2.95 -2.275 90) (size 1.5 0.45) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (model Housings_SSOP.3dshapes/TSSOP-16_4.4x5mm_Pitch0.65mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 5789E95E) (tstamp 5789E66D) + (at 141.605 98.425) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /57892620) + (attr smd) + (fp_text reference C5 (at 0 -1.9) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.9) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 2 +5V)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 5789E981) (tstamp 5789E673) + (at 147.955 98.425 180) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /57892501) + (attr smd) + (fp_text reference C6 (at 0 1.9 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.9 180) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 +3V3)) + (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connect:USB_Mini-B (layer F.Cu) (tedit 578A65F5) (tstamp 578A65DB) + (at 129.032 104.14) + (descr "USB Mini-B 5-pin SMD connector") + (tags "USB USB_B USB_Mini connector") + (path /578834A3) + (attr smd) + (fp_text reference P1 (at 5.842 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value USB_OTG (at 0 -7.0993) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -4.85 -5.7) (end 4.85 -5.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.85 -5.7) (end 4.85 5.7) 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(fill (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 124.46 116.84) (xy 124.46 91.44) (xy 177.8 91.44) (xy 177.8 116.84) + ) + ) + ) +) diff --git a/pcb/USB2SerialMux.net b/pcb/USB2SerialMux.net new file mode 100644 index 0000000..fd04672 --- /dev/null +++ b/pcb/USB2SerialMux.net @@ -0,0 +1,389 @@ +(export (version D) + (design + (source /home/klaute/dev/USB2SerialMux/pcb/USB2SerialMux.sch) + (date "Sa 16 Jul 2016 09:44:53 CEST") + (tool "Eeschema 4.0.2+dfsg1-2~bpo8+1-stable") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title) + (company) + (rev) + (date "11 jul 2016") + (source USB2SerialMux.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value ""))))) + (components + (comp (ref P3) + (value CONN_01X08) + (footprint Pin_Headers:Pin_Header_Straight_1x08) + (libsource (lib conn) (part CONN_01X08)) + (sheetpath (names /) (tstamps /)) + (tstamp 578800A6)) + (comp (ref P4) + (value CONN_01X08) + (footprint Pin_Headers:Pin_Header_Straight_1x08) + (libsource (lib conn) (part CONN_01X08)) + (sheetpath (names /) (tstamps /)) + (tstamp 57880227)) + (comp (ref P2) + (value CONN_01X08) + (footprint Pin_Headers:Pin_Header_Straight_1x08) + (libsource (lib conn) (part CONN_01X08)) + (sheetpath (names /) (tstamps /)) + (tstamp 578802D4)) + (comp (ref P1) + (value USB_OTG) + (footprint Connect:USB_Mini-B) + (libsource (lib conn) (part USB_OTG)) + (sheetpath (names /) (tstamps /)) + (tstamp 578834A3)) + (comp (ref C6) + (value 100n) + (footprint Capacitors_SMD:C_0603_HandSoldering) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 57892501)) + (comp (ref C5) + (value 100n) + (footprint Capacitors_SMD:C_0603_HandSoldering) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 57892620)) + (comp (ref C2) + (value 100n) + (footprint Capacitors_SMD:C_0603_HandSoldering) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 57892EC4)) + (comp (ref C3) + (value 100n) + (footprint Capacitors_SMD:C_0603_HandSoldering) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 57893092)) + (comp (ref C1) + (value 4,7u) + (footprint Capacitors_SMD:C_0805) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 57894879)) + (comp (ref C4) + (value 10n) + (footprint Capacitors_SMD:C_0603_HandSoldering) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 578961B9)) + (comp (ref U2) + (value 74HC4051) + (footprint Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm) + (libsource (lib my74xx) (part 74HC4051)) + (sheetpath (names /) (tstamps /)) + (tstamp 5789DF39)) + (comp (ref U3) + (value 74HCT4051) + (footprint Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm) + (libsource (lib my74xx) (part 74HCT4051)) + (sheetpath (names /) (tstamps /)) + (tstamp 5789E407)) + (comp (ref U1) + (value FT232RL) + (footprint Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm) + (libsource (lib ftdi) (part FT232RL)) + (sheetpath (names /) (tstamps /)) + (tstamp 5789EA06))) + (libparts + (libpart (lib my74xx) (part 74HC4051) + (description "Multiplexer 8 to 1") + (footprints + (fp SSOP16) + (fp TSSOOP16) + (fp SO16) + (fp DHVQFN16)) + (fields + (field (name Reference) U) + (field (name Value) 74HC4051)) + (pins + (pin (num 1) (name Y4) (type input)) + (pin (num 2) (name Y6) (type input)) + (pin (num 3) (name Z) (type output)) + (pin (num 4) (name Y7) (type input)) + (pin (num 5) (name Y5) (type input)) + (pin (num 6) (name ~E) (type input)) + (pin (num 7) (name VEE) (type power_in)) + (pin (num 8) (name GND) (type power_in)) + (pin (num 9) (name S2) (type input)) + (pin (num 10) (name S1) (type input)) + (pin (num 11) (name S0) (type input)) + (pin (num 12) (name Y3) (type input)) + (pin (num 13) (name Y0) (type input)) + (pin (num 14) (name Y1) (type input)) + (pin (num 15) (name Y2) (type input)) + (pin (num 16) (name VCC) (type power_in)))) + (libpart (lib my74xx) (part 74HCT4051) + (description "Demultiplexer 1 to 8") + (footprints + (fp DHVQFN16) + (fp SO16) + (fp TSSOP16) + (fp SSOP16)) + (fields + (field (name Reference) U) + (field (name Value) 74HCT4051)) + (pins + (pin (num 1) (name Y4) (type input)) + (pin (num 2) (name Y6) (type input)) + (pin (num 3) (name Z) (type output)) + (pin (num 4) (name Y7) (type input)) + (pin (num 5) (name Y5) (type input)) + (pin (num 6) (name ~E) (type input)) + (pin (num 7) (name VEE) (type power_in)) + (pin (num 8) (name GND) (type power_in)) + (pin (num 9) (name S2) (type input)) + (pin (num 10) (name S1) (type input)) + (pin (num 11) (name S0) (type input)) + (pin (num 12) (name Y3) (type input)) + (pin (num 13) (name Y0) (type input)) + (pin (num 14) (name Y1) (type input)) + (pin (num 15) (name Y2) (type input)) + (pin (num 16) (name VCC) (type power_in)))) + (libpart (lib device) (part C) + (description "Unpolarized capacitor") + (footprints + (fp C?) + (fp C_????_*) + (fp C_????) + (fp SMD*_c) + (fp Capacitor*)) + (fields + (field (name Reference) C) + (field (name Value) C)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part CONN_01X08) + (description "Connector 01x08") + (footprints + (fp Pin_Header_Straight_1X08) + (fp Pin_Header_Angled_1X08) + (fp Socket_Strip_Straight_1X08) + (fp Socket_Strip_Angled_1X08)) + (fields + (field (name Reference) P) + (field (name Value) CONN_01X08)) + (pins + (pin (num 1) (name P1) (type passive)) + (pin (num 2) (name P2) (type passive)) + (pin (num 3) (name P3) (type passive)) + (pin (num 4) (name P4) (type passive)) + (pin (num 5) (name P5) (type passive)) + (pin (num 6) (name P6) (type passive)) + (pin (num 7) (name P7) (type passive)) + (pin (num 8) (name P8) (type passive)))) + (libpart (lib ftdi) (part FT232RL) + (description "FT232RL USB to UART") + (footprints + (fp SSOP-28) + (fp SSOP28)) + (fields + (field (name Reference) U) + (field (name Value) FT232RL)) + (pins + (pin (num 1) (name TXD) (type BiDi)) + (pin (num 2) (name DTR) (type BiDi)) + (pin (num 3) (name RTS) (type BiDi)) + (pin (num 4) (name VCCIO) (type power_in)) + (pin (num 5) (name RXD) (type BiDi)) + (pin (num 6) (name RI) (type BiDi)) + (pin (num 7) (name GND) (type power_out)) + (pin (num 8) (name NC) (type NotConnected)) + (pin (num 9) (name DSR) (type BiDi)) + (pin (num 10) (name DCD) (type BiDi)) + (pin (num 11) (name CTS) (type BiDi)) + (pin (num 12) (name CBUS4) (type BiDi)) + (pin (num 13) (name CBUS2) (type BiDi)) + (pin (num 14) (name CBUS3) (type BiDi)) + (pin (num 15) (name USBDP) (type BiDi)) + (pin (num 16) (name USBDM) (type BiDi)) + (pin (num 17) (name 3V3OUT) (type power_out)) + (pin (num 18) (name GND) (type power_out)) + (pin (num 19) (name RESET) (type input)) + (pin (num 20) (name VCC) (type power_in)) + (pin (num 21) (name GND) (type power_out)) + (pin (num 22) (name CBUS1) (type BiDi)) + (pin (num 23) (name CBUS0) (type BiDi)) + (pin (num 24) (name NC) (type NotConnected)) + (pin (num 25) (name AGND) (type power_out)) + (pin (num 26) (name TEST) (type power_out)) + (pin (num 27) (name OSCI) (type input)) + (pin (num 28) (name OSCO) (type input)))) + (libpart (lib conn) (part USB_OTG) + (description "micro/mini connector") + (footprints + (fp USB*)) + (fields + (field (name Reference) P) + (field (name Value) USB_OTG)) + (pins + (pin (num 1) (name VCC) (type power_out)) + (pin (num 2) (name D-) (type passive)) + (pin (num 3) (name D+) (type passive)) + (pin (num 4) (name ID) (type power_in)) + (pin (num 5) (name GND) (type power_in)) + (pin (num 6) (name shield) (type passive))))) + (libraries + (library (logical ftdi) + (uri /home/klaute/dev/USB2SerialMux/pcb/ftdi.lib)) + (library (logical my74xx) + (uri /home/klaute/dev/USB2SerialMux/pcb/my74xx.lib)) + (library (logical conn) + (uri /usr/share/kicad/library/conn.lib)) + (library (logical device) + (uri /usr/share/kicad/library/device.lib))) + (nets + (net (code 1) (name GND) + (node (ref U3) (pin 8)) + (node (ref U3) (pin 6)) + (node (ref U2) (pin 8)) + (node (ref U2) (pin 6)) + (node (ref U1) (pin 18)) + (node (ref U1) (pin 26)) + (node (ref U1) (pin 25)) + (node (ref U1) (pin 21)) + (node (ref U1) (pin 7)) + (node (ref P2) (pin 8)) + (node (ref P2) (pin 7)) + (node (ref P2) (pin 6)) + (node (ref P2) (pin 5)) + (node (ref P2) (pin 4)) + (node (ref P2) (pin 3)) + (node (ref P2) (pin 2)) + (node (ref P2) (pin 1)) + (node (ref C4) (pin 2)) + (node (ref P1) (pin 5)) + (node (ref P1) (pin 6)) + (node (ref C2) (pin 1)) + (node (ref C5) (pin 1)) + (node (ref C6) (pin 2)) + (node (ref C3) (pin 1)) + (node (ref C1) (pin 2))) + (net (code 2) (name +5V) + (node (ref C4) (pin 1)) + (node (ref P1) (pin 1)) + (node (ref C1) (pin 1)) + (node (ref C5) (pin 2)) + (node (ref U1) (pin 20))) + (net (code 3) (name /D+) + (node (ref P1) (pin 3)) + (node (ref U1) (pin 15))) + (net (code 4) (name /D-) + (node (ref P1) (pin 2)) + (node (ref U1) (pin 16))) + (net (code 5) (name "Net-(U1-Pad12)") + (node (ref U1) (pin 12))) + (net (code 6) (name "Net-(U1-Pad2)") + (node (ref U1) (pin 2))) + (net (code 7) (name "Net-(U1-Pad3)") + (node (ref U1) (pin 3))) + (net (code 8) (name "Net-(U1-Pad6)") + (node (ref U1) (pin 6))) + (net (code 9) (name "Net-(U1-Pad8)") + (node (ref U1) (pin 8))) + (net (code 10) (name "Net-(U1-Pad9)") + (node (ref U1) (pin 9))) + (net (code 11) (name "Net-(U1-Pad10)") + (node (ref U1) (pin 10))) + (net (code 12) (name "Net-(U1-Pad11)") + (node (ref U1) (pin 11))) + (net (code 13) (name "Net-(U1-Pad22)") + (node (ref U1) (pin 22))) + (net (code 14) (name "Net-(U1-Pad13)") + (node (ref U1) (pin 13))) + (net (code 15) (name "Net-(U1-Pad23)") + (node (ref U1) (pin 23))) + (net (code 16) (name "Net-(U1-Pad14)") + (node (ref U1) (pin 14))) + (net (code 17) (name "Net-(U1-Pad24)") + (node (ref U1) (pin 24))) + (net (code 18) (name "Net-(U1-Pad27)") + (node (ref U1) (pin 27))) + (net (code 19) (name "Net-(U1-Pad28)") + (node (ref U1) (pin 28))) + (net (code 20) (name "Net-(U1-Pad19)") + (node (ref U1) (pin 19))) + (net (code 21) (name /TxD_RxD) + (node (ref U2) (pin 3)) + (node (ref U1) (pin 1))) + (net (code 22) (name /S2) + (node (ref U3) (pin 9)) + (node (ref U2) (pin 9))) + (net (code 23) (name /S1) + (node (ref U3) (pin 10)) + (node (ref U2) (pin 10))) + (net (code 24) (name /S0) + (node (ref U2) (pin 11)) + (node (ref U3) (pin 11))) + (net (code 25) (name "Net-(P1-Pad4)") + (node (ref P1) (pin 4))) + (net (code 26) (name /RxD_TxD) + (node (ref U1) (pin 5)) + (node (ref U3) (pin 3))) + (net (code 27) (name "Net-(P4-Pad5)") + (node (ref P4) (pin 5)) + (node (ref U3) (pin 1))) + (net (code 28) (name "Net-(P3-Pad1)") + (node (ref P3) (pin 1)) + (node (ref U2) (pin 13))) + (net (code 29) (name "Net-(P3-Pad2)") + (node (ref P3) (pin 2)) + (node (ref U2) (pin 14))) + (net (code 30) (name "Net-(P3-Pad3)") + (node (ref U2) (pin 15)) + (node (ref P3) (pin 3))) + (net (code 31) (name "Net-(P3-Pad4)") + (node (ref P3) (pin 4)) + (node (ref U2) (pin 12))) + (net (code 32) (name "Net-(P3-Pad5)") + (node (ref U2) (pin 1)) + (node (ref P3) (pin 5))) + (net (code 33) (name "Net-(P3-Pad6)") + (node (ref P3) (pin 6)) + (node (ref U2) (pin 5))) + (net (code 34) (name "Net-(P3-Pad7)") + (node (ref U2) (pin 2)) + (node (ref P3) (pin 7))) + (net (code 35) (name "Net-(P3-Pad8)") + (node (ref P3) (pin 8)) + (node (ref U2) (pin 4))) + (net (code 36) (name "Net-(P4-Pad1)") + (node (ref P4) (pin 1)) + (node (ref U3) (pin 13))) + (net (code 37) (name "Net-(P4-Pad2)") + (node (ref U3) (pin 14)) + (node (ref P4) (pin 2))) + (net (code 38) (name "Net-(P4-Pad3)") + (node (ref P4) (pin 3)) + (node (ref U3) (pin 15))) + (net (code 39) (name "Net-(P4-Pad4)") + (node (ref P4) (pin 4)) + (node (ref U3) (pin 12))) + (net (code 40) (name "Net-(P4-Pad6)") + (node (ref P4) (pin 6)) + (node (ref U3) (pin 5))) + (net (code 41) (name "Net-(P4-Pad7)") + (node (ref U3) (pin 2)) + (node (ref P4) (pin 7))) + (net (code 42) (name "Net-(P4-Pad8)") + (node (ref P4) (pin 8)) + (node (ref U3) (pin 4))) + (net (code 43) (name +3V3) + (node (ref U3) (pin 16)) + (node (ref U1) (pin 4)) + (node (ref U1) (pin 17)) + (node (ref U2) (pin 7)) + (node (ref U2) (pin 16)) + (node (ref U3) (pin 7)) + (node (ref C6) (pin 1)) + (node (ref C2) (pin 2)) + (node (ref C3) (pin 2))))) diff --git a/pcb/USB2SerialMux.pro b/pcb/USB2SerialMux.pro new file mode 100644 index 0000000..2a87869 --- /dev/null +++ b/pcb/USB2SerialMux.pro @@ -0,0 +1,94 @@ +update=Sa 16 Jul 2016 18:46:23 CEST +version=1 +last_client=kicad +[cvpcb] +version=1 +NetIExt=net +[cvpcb/libraries] +EquName1=devcms +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[pcbnew/libraries] +LibDir= +LibName1=sockets +LibName2=connect +LibName3=discret +LibName4=pin_array +LibName5=divers +LibName6=smd_capacitors +LibName7=smd_resistors +LibName8=smd_crystal&oscillator +LibName9=smd_dil +LibName10=smd_transistors +LibName11=libcms +LibName12=display +LibName13=led +LibName14=dip_sockets +LibName15=pga_sockets +LibName16=valves +[general] +version=1 +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 +[eeschema] +version=1 +LibDir=../USB2SerialMux;../../../../../../media/win/Users/klaute/dev/ChinaCluster/pcb/USB2SerialMux/reichelt.pretty +[eeschema/libraries] +LibName1=my74xx +LibName2=ftdi +LibName3=power +LibName4=device +LibName5=transistors +LibName6=conn +LibName7=linear +LibName8=regul +LibName9=74xx +LibName10=cmos4000 +LibName11=adc-dac +LibName12=memory +LibName13=xilinx +LibName14=special +LibName15=microcontrollers +LibName16=dsp +LibName17=microchip +LibName18=analog_switches +LibName19=motorola +LibName20=texas +LibName21=intel +LibName22=audio +LibName23=interface +LibName24=digital-audio +LibName25=philips +LibName26=display +LibName27=cypress +LibName28=siliconi +LibName29=opto +LibName30=atmel +LibName31=contrib +LibName32=valves +LibName33=USB2SerialMux-cache diff --git a/pcb/USB2SerialMux.sch b/pcb/USB2SerialMux.sch new file mode 100644 index 0000000..907fd1a --- /dev/null +++ b/pcb/USB2SerialMux.sch @@ -0,0 +1,603 @@ +EESchema Schematic File Version 2 +LIBS:my74xx +LIBS:ftdi +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:USB2SerialMux-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "11 jul 2016" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 5250 2500 4950 2500 +Wire Wire Line + 5250 2600 4950 2600 +Text Label 5250 2500 0 60 ~ 0 +TxD_RxD +Text Label 5250 2600 0 60 ~ 0 +RxD_TxD +$Comp +L CONN_01X08 P3 +U 1 1 578800A6 +P 9850 2000 +F 0 "P3" H 9850 2450 50 0000 C CNN +F 1 "CONN_01X08" V 9950 2000 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Straight_1x08" H 9850 2000 50 0001 C CNN +F 3 "" H 9850 2000 50 0000 C CNN + 1 9850 2000 + 1 0 0 -1 +$EndComp +$Comp +L CONN_01X08 P4 +U 1 1 57880227 +P 9850 4650 +F 0 "P4" H 9850 5100 50 0000 C CNN +F 1 "CONN_01X08" V 9950 4650 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Straight_1x08" H 9850 4650 50 0001 C CNN +F 3 "" H 9850 4650 50 0000 C CNN + 1 9850 4650 + 1 0 0 -1 +$EndComp +$Comp +L CONN_01X08 P2 +U 1 1 578802D4 +P 4650 6250 +F 0 "P2" H 4650 6700 50 0000 C CNN +F 1 "CONN_01X08" V 4750 6250 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Straight_1x08" H 4650 6250 50 0001 C CNN +F 3 "" H 4650 6250 50 0000 C CNN + 1 4650 6250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4450 6600 4350 6600 +Wire Wire Line + 4350 5900 4350 6700 +Wire Wire Line + 4350 5900 4450 5900 +Wire Wire Line + 4350 6000 4450 6000 +Connection ~ 4350 6000 +Wire Wire Line + 4350 6100 4450 6100 +Connection ~ 4350 6100 +Wire Wire Line + 4350 6200 4450 6200 +Connection ~ 4350 6200 +Wire Wire Line + 4350 6300 4450 6300 +Connection ~ 4350 6300 +Wire Wire Line + 4350 6400 4450 6400 +Connection ~ 4350 6400 +Wire Wire Line + 4350 6500 4450 6500 +Connection ~ 4350 6500 +Wire Wire Line + 3650 4450 3650 4550 +Wire Wire Line + 3650 4550 4150 4550 +Wire Wire Line + 4000 4550 4000 4450 +Wire Wire Line + 3900 4550 3900 4450 +Connection ~ 3900 4550 +Connection ~ 3800 4550 +$Comp +L GND #PWR01 +U 1 1 57880618 +P 3800 4700 +F 0 "#PWR01" H 3800 4450 50 0001 C CNN +F 1 "GND" H 3800 4550 50 0000 C CNN +F 2 "" H 3800 4700 50 0000 C CNN +F 3 "" H 3800 4700 50 0000 C CNN + 1 3800 4700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3800 4450 3800 4700 +$Comp +L GND #PWR02 +U 1 1 578806F7 +P 4350 6700 +F 0 "#PWR02" H 4350 6450 50 0001 C CNN +F 1 "GND" H 4350 6550 50 0000 C CNN +F 2 "" H 4350 6700 50 0000 C CNN +F 3 "" H 4350 6700 50 0000 C CNN + 1 4350 6700 + 1 0 0 -1 +$EndComp +Connection ~ 4350 6600 +Wire Wire Line + 6850 2500 7150 2500 +Wire Wire Line + 6850 5150 7150 5150 +Text Label 6850 2500 2 60 ~ 0 +TxD_RxD +Text Label 6850 5150 2 60 ~ 0 +RxD_TxD +$Comp +L GND #PWR03 +U 1 1 57880CBC +P 7050 3050 +F 0 "#PWR03" H 7050 2800 50 0001 C CNN +F 1 "GND" H 7050 2900 50 0000 C CNN +F 2 "" H 7050 3050 50 0000 C CNN +F 3 "" H 7050 3050 50 0000 C CNN + 1 7050 3050 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 57880CD9 +P 7050 5700 +F 0 "#PWR04" H 7050 5450 50 0001 C CNN +F 1 "GND" H 7050 5550 50 0000 C CNN +F 2 "" H 7050 5700 50 0000 C CNN +F 3 "" H 7050 5700 50 0000 C CNN + 1 7050 5700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7150 2950 7050 2950 +Wire Wire Line + 7050 2950 7050 3050 +Wire Wire Line + 7150 5600 7050 5600 +Wire Wire Line + 7050 5600 7050 5700 +Wire Wire Line + 8550 1650 9650 1650 +Wire Wire Line + 8550 1750 9650 1750 +Wire Wire Line + 8550 1850 9650 1850 +Wire Wire Line + 8550 1950 9650 1950 +Wire Wire Line + 9650 2050 8550 2050 +Wire Wire Line + 9650 2150 8550 2150 +Wire Wire Line + 9650 2250 8550 2250 +Wire Wire Line + 9650 2350 8550 2350 +Wire Wire Line + 9650 4300 8550 4300 +Wire Wire Line + 9650 4400 8550 4400 +Wire Wire Line + 9650 4500 8550 4500 +Wire Wire Line + 9650 4600 8550 4600 +Wire Wire Line + 9650 4700 8550 4700 +Wire Wire Line + 9650 4800 8550 4800 +Wire Wire Line + 9650 4900 8550 4900 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CNN +F 1 "10n" H 2475 5800 50 0000 L CNN +F 2 "Capacitors_SMD:C_0603_HandSoldering" H 2488 5750 50 0001 C CNN +F 3 "" H 2450 5900 50 0000 C CNN + 1 2450 5900 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 2800 6200 2600 6200 +Wire Wire Line + 2700 5900 2700 6200 +Connection ~ 2700 6200 +Wire Wire Line + 2200 5900 2200 6200 +Connection ~ 2200 6200 +Wire Wire Line + 2600 5900 2700 5900 +Wire Wire Line + 2300 5900 2200 5900 +$Comp +L 74HC4051 U2 +U 1 1 5789DF39 +P 7850 2300 +F 0 "U2" H 7850 2300 50 0000 C CNN +F 1 "74HC4051" H 7850 2150 50 0000 C CNN +F 2 "Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm" H 7850 2300 50 0001 C CNN +F 3 "" H 7850 2300 50 0000 C CNN + 1 7850 2300 + -1 0 0 -1 +$EndComp +$Comp +L 74HCT4051 U3 +U 1 1 5789E407 +P 7850 4950 +F 0 "U3" H 7850 4950 50 0000 C CNN +F 1 "74HCT4051" H 7850 4800 50 0000 C CNN +F 2 "Housings_SSOP:TSSOP-16_4.4x5mm_Pitch0.65mm" H 7850 4950 50 0001 C CNN +F 3 "" H 7850 4950 50 0000 C CNN + 1 7850 4950 + -1 0 0 -1 +$EndComp +$Comp +L FT232RL U1 +U 1 1 5789EA06 +P 3900 3100 +F 0 "U1" H 3900 3300 60 0000 C CNN +F 1 "FT232RL" H 3900 2800 60 0000 C CNN +F 2 "Housings_SSOP:SSOP-28_5.3x10.2mm_Pitch0.65mm" H 3850 3250 60 0001 C CNN +F 3 "" H 3850 3250 60 0000 C CNN + 1 3900 3100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/pcb/ftdi.lib b/pcb/ftdi.lib new file mode 100644 index 0000000..3c88492 --- /dev/null +++ b/pcb/ftdi.lib @@ -0,0 +1,48 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# FT232RL +# +DEF FT232RL U 0 40 Y Y 1 F N +F0 "U" 0 200 60 H V C CNN +F1 "FT232RL" 0 -300 60 H V C CNN +F2 "" -50 150 60 H V C CNN +F3 "" -50 150 60 H V C CNN +$FPLIST + SSOP-28 + SSOP28 +$ENDFPLIST +DRAW +S -700 900 750 -1050 0 1 0 N +X TXD 1 1050 600 300 L 50 50 1 1 B +X DTR 2 1050 50 300 L 50 50 1 1 B I +X RTS 3 1050 250 300 L 50 50 1 1 B I +X VCCIO 4 -1000 800 300 R 50 50 1 1 W +X RXD 5 1050 500 300 L 50 50 1 1 B +X RI 6 1050 -250 300 L 50 50 1 1 B I +X GND 7 -100 -1350 300 U 50 50 1 1 w +X NC 8 -1000 -200 300 R 50 50 1 1 N +X DSR 9 1050 -50 300 L 50 50 1 1 B I +X DCD 10 1050 -150 300 L 50 50 1 1 B I +X VCC 20 -1000 700 300 R 50 50 1 1 W +X CTS 11 1050 150 300 L 50 50 1 1 B I +X GND 21 100 -1350 300 U 50 50 1 1 w +X CBUS4 12 1050 -900 300 L 50 50 1 1 B +X CBUS1 22 1050 -600 300 L 50 50 1 1 B +X CBUS2 13 1050 -700 300 L 50 50 1 1 B +X CBUS0 23 1050 -500 300 L 50 50 1 1 B +X CBUS3 14 1050 -800 300 L 50 50 1 1 B +X NC 24 -1000 -300 300 R 50 50 1 1 N +X USBDP 15 -1000 350 300 R 50 50 1 1 B +X AGND 25 -250 -1350 300 U 50 50 1 1 w +X USBDM 16 -1000 450 300 R 50 50 1 1 B +X TEST 26 250 -1350 300 U 50 50 1 1 w +X 3V3OUT 17 -1000 -900 300 R 50 50 1 1 w +X OSCI 27 -1000 -550 300 R 50 50 1 1 I +X GND 18 0 -1350 300 U 50 50 1 1 w +X OSCO 28 -1000 -650 300 R 50 50 1 1 I +X RESET 19 -1000 50 300 R 50 50 1 1 I I +ENDDRAW +ENDDEF +# +#End Library diff --git a/pcb/my74xx.lib b/pcb/my74xx.lib new file mode 100644 index 0000000..3ca3b49 --- /dev/null +++ b/pcb/my74xx.lib @@ -0,0 +1,72 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 74HC4051 +# +DEF 74HC4051 U 0 10 Y Y 1 F N +F0 "U" 0 0 50 H V C CNN +F1 "74HC4051" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + SSOP16 + TSSOOP16 + SO16 + DHVQFN16 +$ENDFPLIST +DRAW +S -400 700 400 -700 0 1 0 N +X Y4 1 -700 250 300 R 50 50 1 1 I +X Y6 2 -700 50 300 R 50 50 1 1 I +X Z 3 700 -200 300 L 50 50 1 1 O +X Y7 4 -700 -50 300 R 50 50 1 1 I +X Y5 5 -700 150 300 R 50 50 1 1 I +X ~E 6 -700 -650 300 R 50 50 1 1 I I +X VEE 7 700 400 300 L 50 50 1 1 W +X GND 8 700 -650 300 L 50 50 1 1 W +X S2 9 -700 -450 300 R 50 50 1 1 I +X S1 10 -700 -350 300 R 50 50 1 1 I +X S0 11 -700 -250 300 R 50 50 1 1 I +X Y3 12 -700 350 300 R 50 50 1 1 I +X Y0 13 -700 650 300 R 50 50 1 1 I +X Y1 14 -700 550 300 R 50 50 1 1 I +X Y2 15 -700 450 300 R 50 50 1 1 I +X VCC 16 700 650 300 L 50 50 1 1 W +ENDDRAW +ENDDEF +# +# 74HCT4051 +# +DEF 74HCT4051 U 0 10 Y Y 1 F N +F0 "U" 0 0 50 H V C CNN +F1 "74HCT4051" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + DHVQFN16 + SO16 + TSSOP16 + SSOP16 +$ENDFPLIST +DRAW +S -400 700 400 -700 0 1 0 N +X Y4 1 -700 250 300 R 50 50 1 1 I +X Y6 2 -700 50 300 R 50 50 1 1 I +X Z 3 700 -200 300 L 50 50 1 1 O +X Y7 4 -700 -50 300 R 50 50 1 1 I +X Y5 5 -700 150 300 R 50 50 1 1 I +X ~E 6 -700 -650 300 R 50 50 1 1 I I +X VEE 7 700 400 300 L 50 50 1 1 W +X GND 8 700 -650 300 L 50 50 1 1 W +X S2 9 -700 -450 300 R 50 50 1 1 I +X S1 10 -700 -350 300 R 50 50 1 1 I +X S0 11 -700 -250 300 R 50 50 1 1 I +X Y3 12 -700 350 300 R 50 50 1 1 I +X Y0 13 -700 650 300 R 50 50 1 1 I +X Y1 14 -700 550 300 R 50 50 1 1 I +X Y2 15 -700 450 300 R 50 50 1 1 I +X VCC 16 700 650 300 L 50 50 1 1 W +ENDDRAW +ENDDEF +# +#End Library