654 lines
21 KiB
C
Executable file
654 lines
21 KiB
C
Executable file
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
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/*This file is prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief Management of the AT45DBX data flash controller through SPI.
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*
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* This file manages the accesses to the AT45DBX data flash components.
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*
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* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
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* - Supported devices: All AVR32 devices with an SPI module can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.no/
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*
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******************************************************************************/
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/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an Atmel
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* AVR product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
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*
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*/
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//_____ I N C L U D E S ___________________________________________________
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#include "conf_access.h"
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#if AT45DBX_MEM == ENABLE
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#include "compiler.h"
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#include "board.h"
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#include "gpio.h"
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#include "spi.h"
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#include "conf_at45dbx.h"
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#include "at45dbx.h"
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#if AT45DBX_MEM_CNT > 4
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#error AT45DBX_MEM_CNT must not exceed 4
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#endif
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//_____ D E F I N I T I O N S ______________________________________________
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/*! \name AT45DBX Group A Commands
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*/
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//! @{
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#define AT45DBX_CMDA_RD_PAGE 0xD2 //!< Main Memory Page Read (Serial/8-bit Mode).
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#define AT45DBX_CMDA_RD_ARRAY_LEG 0xE8 //!< Continuous Array Read, Legacy Command (Serial/8-bit Mode).
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#define AT45DBX_CMDA_RD_ARRAY_LF_SM 0x03 //!< Continuous Array Read, Low-Frequency Mode (Serial Mode).
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#define AT45DBX_CMDA_RD_ARRAY_AF_SM 0x0B //!< Continuous Array Read, Any-Frequency Mode (Serial Mode).
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#define AT45DBX_CMDA_RD_SECTOR_PROT_REG 0x32 //!< Read Sector Protection Register (Serial/8-bit Mode).
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#define AT45DBX_CMDA_RD_SECTOR_LKDN_REG 0x35 //!< Read Sector Lockdown Register (Serial/8-bit Mode).
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#define AT45DBX_CMDA_RD_SECURITY_REG 0x77 //!< Read Security Register (Serial/8-bit Mode).
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//! @}
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/*! \name AT45DBX Group B Commands
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*/
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//! @{
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#define AT45DBX_CMDB_ER_PAGE 0x81 //!< Page Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_ER_BLOCK 0x50 //!< Block Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_ER_SECTOR 0x7C //!< Sector Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_ER_CHIP 0xC794809A //!< Chip Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_XFR_PAGE_TO_BUF1 0x53 //!< Main Memory Page to Buffer 1 Transfer (Serial/8-bit Mode).
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#define AT45DBX_CMDB_XFR_PAGE_TO_BUF2 0x55 //!< Main Memory Page to Buffer 2 Transfer (Serial/8-bit Mode).
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#define AT45DBX_CMDB_CMP_PAGE_TO_BUF1 0x60 //!< Main Memory Page to Buffer 1 Compare (Serial/8-bit Mode).
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#define AT45DBX_CMDB_CMP_PAGE_TO_BUF2 0x61 //!< Main Memory Page to Buffer 2 Compare (Serial/8-bit Mode).
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#define AT45DBX_CMDB_PR_BUF1_TO_PAGE_ER 0x83 //!< Buffer 1 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_PR_BUF2_TO_PAGE_ER 0x86 //!< Buffer 2 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_PR_BUF1_TO_PAGE 0x88 //!< Buffer 1 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_PR_BUF2_TO_PAGE 0x89 //!< Buffer 2 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode).
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#define AT45DBX_CMDB_PR_PAGE_TH_BUF1 0x82 //!< Main Memory Page Program through Buffer 1 (Serial/8-bit Mode).
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#define AT45DBX_CMDB_PR_PAGE_TH_BUF2 0x85 //!< Main Memory Page Program through Buffer 2 (Serial/8-bit Mode).
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#define AT45DBX_CMDB_RWR_PAGE_TH_BUF1 0x58 //!< Auto Page Rewrite through Buffer 1 (Serial/8-bit Mode).
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#define AT45DBX_CMDB_RWR_PAGE_TH_BUF2 0x59 //!< Auto Page Rewrite through Buffer 2 (Serial/8-bit Mode).
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//! @}
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/*! \name AT45DBX Group C Commands
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*/
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//! @{
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#define AT45DBX_CMDC_RD_BUF1_LF_SM 0xD1 //!< Buffer 1 Read, Low-Frequency Mode (Serial Mode).
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#define AT45DBX_CMDC_RD_BUF2_LF_SM 0xD3 //!< Buffer 2 Read, Low-Frequency Mode (Serial Mode).
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#define AT45DBX_CMDC_RD_BUF1_AF_SM 0xD4 //!< Buffer 1 Read, Any-Frequency Mode (Serial Mode).
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#define AT45DBX_CMDC_RD_BUF2_AF_SM 0xD6 //!< Buffer 2 Read, Any-Frequency Mode (Serial Mode).
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#define AT45DBX_CMDC_RD_BUF1_AF_8M 0x54 //!< Buffer 1 Read, Any-Frequency Mode (8-bit Mode).
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#define AT45DBX_CMDC_RD_BUF2_AF_8M 0x56 //!< Buffer 2 Read, Any-Frequency Mode (8-bit Mode).
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#define AT45DBX_CMDC_WR_BUF1 0x84 //!< Buffer 1 Write (Serial/8-bit Mode).
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#define AT45DBX_CMDC_WR_BUF2 0x87 //!< Buffer 2 Write (Serial/8-bit Mode).
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#define AT45DBX_CMDC_RD_STATUS_REG 0xD7 //!< Status Register Read (Serial/8-bit Mode).
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#define AT45DBX_CMDC_RD_MNFCT_DEV_ID_SM 0x9F //!< Manufacturer and Device ID Read (Serial Mode).
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//! @}
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/*! \name AT45DBX Group D Commands
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*/
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//! @{
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#define AT45DBX_CMDD_EN_SECTOR_PROT 0x3D2A7FA9 //!< Enable Sector Protection (Serial/8-bit Mode).
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#define AT45DBX_CMDD_DIS_SECTOR_PROT 0x3D2A7F9A //!< Disable Sector Protection (Serial/8-bit Mode).
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#define AT45DBX_CMDD_ER_SECTOR_PROT_REG 0x3D2A7FCF //!< Erase Sector Protection Register (Serial/8-bit Mode).
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#define AT45DBX_CMDD_PR_SECTOR_PROT_REG 0x3D2A7FFC //!< Program Sector Protection Register (Serial/8-bit Mode).
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#define AT45DBX_CMDD_LKDN_SECTOR 0x3D2A7F30 //!< Sector Lockdown (Serial/8-bit Mode).
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#define AT45DBX_CMDD_PR_SECURITY_REG 0x9B000000 //!< Program Security Register (Serial/8-bit Mode).
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#define AT45DBX_CMDD_PR_CONF_REG 0x3D2A80A6 //!< Program Configuration Register (Serial/8-bit Mode).
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#define AT45DBX_CMDD_DEEP_PWR_DN 0xB9 //!< Deep Power-down (Serial/8-bit Mode).
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#define AT45DBX_CMDD_RSM_DEEP_PWR_DN 0xAB //!< Resume from Deep Power-down (Serial/8-bit Mode).
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//! @}
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/*! \name Bit-Masks and Values for the Status Register
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*/
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//! @{
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#define AT45DBX_MSK_BUSY 0x80 //!< Busy status bit-mask.
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#define AT45DBX_BUSY 0x00 //!< Busy status value (0x00 when busy, 0x80 when ready).
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#define AT45DBX_MSK_DENSITY 0x3C //!< Device density bit-mask.
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//! @}
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#if AT45DBX_MEM_SIZE == AT45DBX_1MB
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/*! \name AT45DB081 Memories
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*/
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//! @{
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#define AT45DBX_DENSITY 0x24 //!< Device density value.
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#define AT45DBX_BYTE_ADDR_BITS 9 //!< Address bits for byte position within buffer.
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//! @}
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#elif AT45DBX_MEM_SIZE == AT45DBX_2MB
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/*! \name AT45DB161 Memories
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*/
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//! @{
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#define AT45DBX_DENSITY 0x2C //!< Device density value.
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#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer.
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//! @}
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#elif AT45DBX_MEM_SIZE == AT45DBX_4MB
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/*! \name AT45DB321 Memories
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*/
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//! @{
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#define AT45DBX_DENSITY 0x34 //!< Device density value.
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#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer.
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//! @}
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#elif AT45DBX_MEM_SIZE == AT45DBX_8MB
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/*! \name AT45DB642 Memories
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*/
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//! @{
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#define AT45DBX_DENSITY 0x3C //!< Device density value.
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#define AT45DBX_BYTE_ADDR_BITS 11 //!< Address bits for byte position within buffer.
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//! @}
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#else
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#error AT45DBX_MEM_SIZE is not defined to a supported value
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#endif
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//! Address bits for page selection.
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#define AT45DBX_PAGE_ADDR_BITS (AT45DBX_MEM_SIZE - AT45DBX_PAGE_BITS)
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//! Number of bits for addresses within pages.
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#define AT45DBX_PAGE_BITS (AT45DBX_BYTE_ADDR_BITS - 1)
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//! Page size in bytes.
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#define AT45DBX_PAGE_SIZE (1 << AT45DBX_PAGE_BITS)
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//! Bit-mask for byte position within buffer in \ref gl_ptr_mem.
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#define AT45DBX_MSK_PTR_BYTE ((1 << AT45DBX_PAGE_BITS) - 1)
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//! Bit-mask for page selection in \ref gl_ptr_mem.
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#define AT45DBX_MSK_PTR_PAGE (((1 << AT45DBX_PAGE_ADDR_BITS) - 1) << AT45DBX_PAGE_BITS)
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//! Bit-mask for byte position within sector in \ref gl_ptr_mem.
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#define AT45DBX_MSK_PTR_SECTOR ((1 << AT45DBX_SECTOR_BITS) - 1)
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/*! \brief Sends a dummy byte through SPI.
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*/
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#define spi_write_dummy() spi_write(AT45DBX_SPI, 0xFF)
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//! Boolean indicating whether memory is in busy state.
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static Bool at45dbx_busy;
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//! Memory data pointer.
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static U32 gl_ptr_mem;
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//! Sector buffer.
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static U8 sector_buf[AT45DBX_SECTOR_SIZE];
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/*! \name Control Functions
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*/
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//! @{
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Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz)
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{
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// Setup SPI registers according to spiOptions.
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for (spiOptions.reg = AT45DBX_SPI_FIRST_NPCS;
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spiOptions.reg < AT45DBX_SPI_FIRST_NPCS + AT45DBX_MEM_CNT;
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spiOptions.reg++)
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{
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if (spi_setupChipReg(AT45DBX_SPI, &spiOptions, pba_hz) != SPI_OK) return KO;
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}
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// Memory ready.
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at45dbx_busy = FALSE;
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return OK;
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}
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/*! \brief Selects or unselects a DF memory.
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*
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* \param memidx Memory ID of DF to select or unselect.
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* \param bSelect Boolean indicating whether the DF memory has to be selected.
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*/
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static void at45dbx_chipselect_df(U8 memidx, Bool bSelect)
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{
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if (bSelect)
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{
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// Select SPI chip.
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spi_selectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx);
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}
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else
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{
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// Unselect SPI chip.
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spi_unselectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx);
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}
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}
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Bool at45dbx_mem_check(void)
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{
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U8 df;
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U16 status = 0;
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// DF memory check.
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for (df = 0; df < AT45DBX_MEM_CNT; df++)
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{
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// Select the DF memory to check.
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at45dbx_chipselect_df(df, TRUE);
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// Send the Status Register Read command.
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spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG);
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// Send a dummy byte to read the status register.
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spi_write_dummy();
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spi_read(AT45DBX_SPI, &status);
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// Unselect the checked DF memory.
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at45dbx_chipselect_df(df, FALSE);
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// Unexpected device density value.
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if ((status & AT45DBX_MSK_DENSITY) < AT45DBX_DENSITY) return KO;
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}
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return OK;
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}
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/*! \brief Waits until the DF is ready.
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*/
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static void at45dbx_wait_ready(void)
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{
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U16 status;
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// Select the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
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// Send the Status Register Read command.
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spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG);
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// Read the status register until the DF is ready.
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do
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{
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// Send a dummy byte to read the status register.
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spi_write_dummy();
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spi_read(AT45DBX_SPI, &status);
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} while ((status & AT45DBX_MSK_BUSY) == AT45DBX_BUSY);
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// Unselect the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
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}
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Bool at45dbx_read_open(U32 sector)
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{
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U32 addr;
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// Set the global memory pointer to a byte address.
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gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE.
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// If the DF memory is busy, wait until it's ready.
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if (at45dbx_busy) at45dbx_wait_ready();
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at45dbx_busy = FALSE;
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// Select the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
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// Initiate a page read at a given sector.
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// Send the Main Memory Page Read command.
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spi_write(AT45DBX_SPI, AT45DBX_CMDA_RD_PAGE);
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// Send the three address bytes, which comprise:
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// - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits;
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// - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read;
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// - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page.
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// NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local
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// DF addressing. They are used for DF discrimination when there are several DFs.
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addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) |
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Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE);
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spi_write(AT45DBX_SPI, LSB2W(addr));
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spi_write(AT45DBX_SPI, LSB1W(addr));
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spi_write(AT45DBX_SPI, LSB0W(addr));
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// Send 32 don't care clock cycles to initialize the read operation.
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spi_write_dummy();
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spi_write_dummy();
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spi_write_dummy();
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spi_write_dummy();
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return OK;
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}
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void at45dbx_read_close(void)
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{
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// Unselect the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
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// Memory ready.
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at45dbx_busy = FALSE;
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}
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Bool at45dbx_write_open(U32 sector)
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{
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U32 addr;
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// Set the global memory pointer to a byte address.
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gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE.
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// If the DF memory is busy, wait until it's ready.
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if (at45dbx_busy) at45dbx_wait_ready();
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at45dbx_busy = FALSE;
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#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE
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// Select the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
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// Transfer the content of the current page to buffer 1.
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// Send the Main Memory Page to Buffer 1 Transfer command.
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spi_write(AT45DBX_SPI, AT45DBX_CMDB_XFR_PAGE_TO_BUF1);
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// Send the three address bytes, which comprise:
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// - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits;
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// - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read;
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// - then AT45DBX_BYTE_ADDR_BITS don't care bits.
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// NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local
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// DF addressing. They are used for DF discrimination when there are several DFs.
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addr = Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS;
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spi_write(AT45DBX_SPI, LSB2W(addr));
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spi_write(AT45DBX_SPI, LSB1W(addr));
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spi_write(AT45DBX_SPI, LSB0W(addr));
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// Unselect the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
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// Wait for end of page transfer.
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at45dbx_wait_ready();
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#endif
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// Select the DF memory gl_ptr_mem points to.
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at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
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// Initiate a page write at a given sector.
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// Send the Main Memory Page Program through Buffer 1 command.
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spi_write(AT45DBX_SPI, AT45DBX_CMDB_PR_PAGE_TH_BUF1);
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// Send the three address bytes, which comprise:
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// - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits;
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// - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be written;
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// - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page.
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// NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local
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// DF addressing. They are used for DF discrimination when there are several DFs.
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addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) |
|
|
Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE);
|
|
spi_write(AT45DBX_SPI, LSB2W(addr));
|
|
spi_write(AT45DBX_SPI, LSB1W(addr));
|
|
spi_write(AT45DBX_SPI, LSB0W(addr));
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
void at45dbx_write_close(void)
|
|
{
|
|
// While end of logical sector not reached, zero-fill remaining memory bytes.
|
|
while (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_SECTOR))
|
|
{
|
|
spi_write(AT45DBX_SPI, 0x00);
|
|
gl_ptr_mem++;
|
|
}
|
|
|
|
// Unselect the DF memory gl_ptr_mem points to.
|
|
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
|
|
|
|
// Memory busy.
|
|
at45dbx_busy = TRUE;
|
|
}
|
|
|
|
|
|
//! @}
|
|
|
|
|
|
/*! \name Single-Byte Access Functions
|
|
*/
|
|
//! @{
|
|
|
|
|
|
U8 at45dbx_read_byte(void)
|
|
{
|
|
U16 data;
|
|
|
|
// Memory busy.
|
|
if (at45dbx_busy)
|
|
{
|
|
// Being here, we know that we previously finished a page read.
|
|
// => We have to access the next page.
|
|
|
|
// Memory ready.
|
|
at45dbx_busy = FALSE;
|
|
|
|
// Eventually select the next DF and open the next page.
|
|
// NOTE: at45dbx_read_open input parameter is a sector.
|
|
at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
|
|
}
|
|
|
|
// Send a dummy byte to read the next data byte.
|
|
spi_write_dummy();
|
|
spi_read(AT45DBX_SPI, &data);
|
|
gl_ptr_mem++;
|
|
|
|
// If end of page reached,
|
|
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
|
|
{
|
|
// unselect the DF memory gl_ptr_mem points to.
|
|
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
|
|
|
|
// Memory busy.
|
|
at45dbx_busy = TRUE;
|
|
}
|
|
|
|
return data;
|
|
}
|
|
|
|
|
|
Bool at45dbx_write_byte(U8 b)
|
|
{
|
|
// Memory busy.
|
|
if (at45dbx_busy)
|
|
{
|
|
// Being here, we know that we previously launched a page programming.
|
|
// => We have to access the next page.
|
|
|
|
// Eventually select the next DF and open the next page.
|
|
// NOTE: at45dbx_write_open input parameter is a sector.
|
|
at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
|
|
}
|
|
|
|
// Write the next data byte.
|
|
spi_write(AT45DBX_SPI, b);
|
|
gl_ptr_mem++;
|
|
|
|
// If end of page reached,
|
|
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
|
|
{
|
|
// unselect the DF memory gl_ptr_mem points to in order to program the page.
|
|
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
|
|
|
|
// Memory busy.
|
|
at45dbx_busy = TRUE;
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
//! @}
|
|
|
|
|
|
/*! \name Multiple-Sector Access Functions
|
|
*/
|
|
//! @{
|
|
|
|
|
|
Bool at45dbx_read_multiple_sector(U16 nb_sector)
|
|
{
|
|
while (nb_sector--)
|
|
{
|
|
// Read the next sector.
|
|
at45dbx_read_sector_2_ram(sector_buf);
|
|
at45dbx_read_multiple_sector_callback(sector_buf);
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
Bool at45dbx_write_multiple_sector(U16 nb_sector)
|
|
{
|
|
while (nb_sector--)
|
|
{
|
|
// Write the next sector.
|
|
at45dbx_write_multiple_sector_callback(sector_buf);
|
|
at45dbx_write_sector_from_ram(sector_buf);
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
//! @}
|
|
|
|
|
|
/*! \name Single-Sector Access Functions
|
|
*/
|
|
//! @{
|
|
|
|
|
|
Bool at45dbx_read_sector_2_ram(void *ram)
|
|
{
|
|
U8 *_ram = ram;
|
|
U16 i;
|
|
U16 data;
|
|
|
|
// Memory busy.
|
|
if (at45dbx_busy)
|
|
{
|
|
// Being here, we know that we previously finished a page read.
|
|
// => We have to access the next page.
|
|
|
|
// Memory ready.
|
|
at45dbx_busy = FALSE;
|
|
|
|
// Eventually select the next DF and open the next page.
|
|
// NOTE: at45dbx_read_open input parameter is a sector.
|
|
at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
|
|
}
|
|
|
|
// Read the next sector.
|
|
for (i = AT45DBX_SECTOR_SIZE; i; i--)
|
|
{
|
|
// Send a dummy byte to read the next data byte.
|
|
spi_write_dummy();
|
|
spi_read(AT45DBX_SPI, &data);
|
|
*_ram++ = data;
|
|
}
|
|
|
|
// Update the memory pointer.
|
|
gl_ptr_mem += AT45DBX_SECTOR_SIZE;
|
|
|
|
#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE
|
|
// If end of page reached,
|
|
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
|
|
#endif
|
|
{
|
|
// unselect the DF memory gl_ptr_mem points to.
|
|
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
|
|
|
|
// Memory busy.
|
|
at45dbx_busy = TRUE;
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
Bool at45dbx_write_sector_from_ram(const void *ram)
|
|
{
|
|
const U8 *_ram = ram;
|
|
U16 i;
|
|
|
|
// Memory busy.
|
|
if (at45dbx_busy)
|
|
{
|
|
// Being here, we know that we previously launched a page programming.
|
|
// => We have to access the next page.
|
|
|
|
// Eventually select the next DF and open the next page.
|
|
// NOTE: at45dbx_write_open input parameter is a sector.
|
|
at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
|
|
}
|
|
|
|
// Write the next sector.
|
|
for (i = AT45DBX_SECTOR_SIZE; i; i--)
|
|
{
|
|
// Write the next data byte.
|
|
spi_write(AT45DBX_SPI, *_ram++);
|
|
}
|
|
|
|
// Update the memory pointer.
|
|
gl_ptr_mem += AT45DBX_SECTOR_SIZE;
|
|
|
|
#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE
|
|
// If end of page reached,
|
|
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
|
|
#endif
|
|
{
|
|
// unselect the DF memory gl_ptr_mem points to in order to program the page.
|
|
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
|
|
|
|
// Memory busy.
|
|
at45dbx_busy = TRUE;
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
//! @}
|
|
|
|
|
|
#endif // AT45DBX_MEM == ENABLE
|